10 Gbit/s bit interleaving CDR for low-power PON

Author: Hungkei Chow, Zhisheng Li, Xing-Zhi Qiu, Dusan Suvakovic, Guy Torfs, Christophe Van Praet, Peter Vetter, Xin Yin
Publisher: Institution of Engineering and Technology (IET)

ABOUT BOOK

A novel, low power, downstream clock and data recovery (CDR)- decimator architecture is proposed for next generation, energy efficient 10 Gbit/s optical network units (ONUs). The architecture employs a new time division multiplexing bit-interleaving downstream concept for passive optical networks (Bi-PON) allowing early decimation of the incoming data and lowering of the processing speed to the user rate of the ONU, thus reducing the power consumption significantly

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